Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel
-
Updated
Jan 23, 2020 - Scala
Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel
C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)
A fault-injection framework using Chisel and FIRRTL
Implementation of the Advanced Encryption Standard in Chisel
😱 RoCC Accelerator Integration with Chipyard
Make writing trivial inst{ruction,rumentation}s for RocketChip as simple as writing the C code
ROCC accelerator ISA based neuroSynapse
ROCC REST API service
Custom RISC-V RoCC accelerator on Chipyard — from register-only compute to autonomous streaming DMA to a real network-checksum algorithm, verified on Rocket and BOOM in Verilator.
To associate your repository with the rocc topic, visit your repo's landing page and select "manage topics."